View 24AA08ST_1245721.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? 2003 microchip technology inc. ds21710c-page 1 24aa08/24lc08b device selection table features ? single supply with operation down to 1.8v low-power cmos technology - 1 ma active current typical -1 a standby current typical (i-temp) organized as 4 blocks of 256 bytes (4 x 256 x 8) 2-wire serial interface bus, i 2 c? compatible schmitt trigger inputs for noise suppression output slope control to eliminate ground bounce 100 khz (<2.5v) and 400 khz ( 2.5v) compatibility self-timed write cycle (including auto-erase) page write buffer for up to 16 bytes 2 ms typical write cycle time for page write hardware write-protect for entire memory can be operated as a serial rom factory programming (qtp) available esd protection > 4,000v 1,000,000 erase/write cycles data retention > 200 years 8-lead pdip, soic, tssop and msop packages 5-lead sot-23 package standard and pb-free finishes available available for extended temperature ranges: - industrial (i): -40c to +85c - automotive (e): -40c to +125c description the microchip technology inc. 24aa08/24lc08b (24xx08*) is a 8 kbit electrically erasable prom. the device is organized as four blocks of 256 x 8-bit memory with a 2-wire serial interface. low voltage design permits operation down to 1.8v, with standby and active currents of only 1 a and 1 ma, respectively. the 24xx08 also has a page write capability for up to 16 bytes of data. the 24xx08 is available in the standard 8-pin pdip, surface mount soic, tssop and msop packages and is also available in the 5-lead sot-23 package. package types block diagram part number v cc range max clock frequency temp ranges 24aa08 1.8-5.5 400 khz (1) i 24lc08b 2.5-5.5 400 khz i, e note 1: 100 khz for v cc <2.5v 24xx08 a0 a1 a2 vss 1 2 3 4 8 7 6 5 vcc wp scl sda pdip/soic/tssop/msop sot-23-5 15 4 3 24xx08 scl vss sda wp vcc 2 note: pins a0, a1 and a2 are not used by the 24xx08. (no internal connections). hv eeprom array page ydec xdec sense amp. memory control logic i/o control logic i/o wp sda scl v cc v ss r/w control latches generator 8k i 2 c ? serial eeprom *24xx08 is used in this document as a generic part number for the 24aa08/24lc08b devices.
24aa08/24lc08b ds21710c-page 2 ? 2003 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings (?) v cc ............................................................................................................................... ..............................................6.5v all inputs and outputs w.r.t. v ss ......................................................................................................... -0.3v to v cc +1.0v storage temperature ............................................................................................................ ...................-65c to +150c ambient temperature with power applied ......................................................................................... .......-65c to +125c esd protection on all pins ............................................................................................................................... ....................... 4kv table 1-1: dc characteristics ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. dc characteristics v cc = +1.8v to +5.5v industrial (i): t a = -40c to +85c automotive (e): t a = -40c to +125c param. no. symbol characteristic min typ max units conditions d1 v ih wp, scl and sda pins ? ???? d2 ? high-level input voltage 0.7 v cc ??v? d3 v il low-level input voltage ? ? 0.3 v cc v? d4 v hys hysteresis of schmitt trigger inputs 0.05 v cc ??v (note) d5 v ol low-level output voltage ? ? 0.40 v i ol = 3.0 ma, v cc = 2.5v d6 i li input leakage current ??1 av in =.1v to v cc d7 i lo output leakage current ??1 av out =.1v to v cc d8 c in , c out pin capacitance (all inputs/outputs) ??10pfv cc = 5.0v (note) t a = 25c, f clk = 1 mhz d9 i cc write operating current ?0.1 3mav cc = 5.5v, scl = 400 khz d10 i cc read ? 0.05 1 ma ? d11 i ccs standby current ? ? 0.01 ? 1 5 a a industrial automotive sda = scl = v cc wp = v ss note: this parameter is periodically sampled and not 100% tested.
? 2003 microchip technology inc. ds21710c-page 3 24aa08/24lc08b table 1-2: ac characteristics ac characteristics v cc = +1.8v to +5.5v industrial (i): t a = -40c to +85c automotive (e): t a = -40c to +125c param. no. symbol characteristic min typ max units conditions 1f clk clock frequency ? ? ? ? 400 100 khz 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 2 t high clock high time 600 4000 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 3t low clock low time 1300 4700 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 4t r sda and scl rise time (note 1) ? ? ? ? 300 1000 ns 2.5v v cc 5.5v (note 1) 1.8v v cc < 2.5v (24aa08) (note 1) 5t f sda and scl fall time ? ? ? 300 ns (note 1) 6t hd : sta start condition hold time 600 4000 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 7t su : sta start condition setup time 600 4700 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 8t hd : dat data input hold time 0 ? ? ?ns (note 2) 9t su : dat data input setup time 100 250 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 10 t su : sto stop condition setup time 600 4000 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 11 t aa output valid from clock (note 2) ? ? ? ? 900 3500 ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 12 t buf bus free time: time the bus must be free before a new transmission can start 1300 4700 ? ? ? ? ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 13 t of output fall time from v ih minimum to v il maximum 20+0.1c b ? ? ? 250 250 ns 2.5v v cc 5.5v 1.8v v cc < 2.5v (24aa08) 14 t sp input filter spike suppression (sda and scl pins) ? ? 50 ns (notes 1 and 3) 15 t wc write cycle time (byte or page) ??5ms? 16 ? endurance 1m ? ? cycles 25c, (note 4) note 1: not 100% tested. c b = total capacitance of one bus line in pf. 2: as a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of scl to avoid unintended generation of start or stop conditions. 3: the combined t sp and v hys specifications are due to new schmitt trigger inputs which provide improved noise spike suppression. this eliminates the need for a t i specification for standard operation. 4: this parameter is not tested but ensured by characterization. for endurance estimates in a specific application, please consult the total endurance? model which can be obtained from microchip?s web site: www.microchip.com.
24aa08/24lc08b ds21710c-page 4 ? 2003 microchip technology inc. figure 1-1: bus timing data figure 1-2: bus timing start/stop 7 5 2 4 8 9 10 12 11 14 6 scl sda in sda out 3 7 6 d4 10 start stop scl sda
? 2003 microchip technology inc. ds21710c-page 5 24aa08/24lc08b 2.0 functional description the 24xx08 supports a bidirectional, 2-wire bus and data transmission protocol. a device that sends data onto the bus is defined as a transmitter, while a device receiving data is defined as a receiver. the bus has to be controlled by a master device which generates the serial clock (scl), controls the bus access and generates the start and stop conditions, while the 24xx08 works as slave. both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. 3.0 bus characteristics the following bus protocol has been defined: data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high will be interpreted as a start or stop condition. accordingly, the following bus conditions have been defined (figure 3-1). 3.1 bus not busy (a) both data and clock lines remain high. 3.2 start data transfer (b) a high-to-low transition of the sda line while the clock (scl) is high determines a start condition. all commands must be preceded by a start condition. 3.3 stop data transfer (c) a low-to-high transition of the sda line while the clock (scl) is high determines a stop condition. all operations must be ended with a stop condition. 3.4 data valid (d) the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start condition and terminated with a stop condition. the number of the data bytes transferred between the start and stop conditions is determined by the master device and is theoretically unlimited, although only the last sixteen will be stored when doing a write operation. when an overwrite does occur it will replace data in a first-in first- out (fifo) fashion. 3.5 acknowledge each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse which is associated with this acknowledge bit. the device that acknowledges, has to pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge related clock pulse. of course, setup and hold times must be taken into account. during reads, a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave (24xx08) will leave the data line high to enable the master to generate the stop condition. figure 3-1: data transfer sequence on the serial bus note: the 24xx08 does not generate any acknowledge bits if an internal program- ming cycle is in progress. scl sda (a) (b) (d) (d) (a ) (c) start condition address or acknowledge valid data allowed to change stop condition
24aa08/24lc08b ds21710c-page 6 ? 2003 microchip technology inc. 3.6 device addressing a control byte is the first byte received following the start condition from the master device (figure 3-2). the control byte consists of a four-bit control code. for the 24xx08,this is set as ? 1010 ? binary for read and write operations. the next three bits of the control byte are the block-select bits (b2, b1, b0). b2 is a ?don?t care? for the 24xx08. they are used by the master device to select which of the four 256 word-blocks of memory are to be accessed. these bits are in effect the three most significant bits of the word address. the last bit of the control byte defines the operation to be performed. when set to ? 1 ?, a read operation is selected. when set to ? 0 ? a write operation is selected. following the start condition, the 24xx08 monitors the sda bus checking the device type identifier being transmitted and, upon receiving a ? 1010 ? code, the slave device outputs an acknowledge signal on the sda line. depending on the state of the r/w bit, the 24xx08 will select a read or write operation. figure 3-2: control byte allocation operation control code block select r/w read 1010 block address 1 write 1010 block address 0 1010 xb1b0 r/w a start read/write slave address x = ?don?t care?
? 2003 microchip technology inc. ds21710c-page 7 24aa08/24lc08b 4.0 write operation 4.1 byte write following the start condition from the master, the device code (4 bits), the block address (3 bits) and the r/w bit, which is a logic-low, is placed onto the bus by the master transmitter. this indicates to the addressed slave receiver that a byte with a word address will follow once it has generated an acknowledge bit during the ninth clock cycle. therefore, the next byte transmit- ted by the master is the word address and will be written into the address pointer of the 24xx08. after receiving another acknowledge signal from the 24xx08, the master device will transmit the data word to be written into the addressed memory location. the 24xx08 acknowledges again and the master generates a stop condition. this initiates the internal write cycle and, during this time, the 24xx08 will not generate acknowledge signals (figure 4-1). 4.2 page write the write control byte, word address and the first data byte are transmitted to the 24xx08 in the same way as in a byte write. however, instead of generating a stop condition, the master transmits up to 16 data bytes to the 24xx08, which are temporarily stored in the on- chip page buffer and will be written into memory once the master has transmitted a stop condition. upon receipt of each word, the four lower-order address pointer bits are internally incremented by ? 1 ?. the higher-order 7 bits of the word address remain constant. if the master should transmit more than 16 words prior to generating the stop condition, the address counter will roll over and the previously received data will be overwritten. as with the byte write operation, once the stop condition is received an internal write cycle will begin (figure 4-2). figure 4-1: byte write figure 4-2: page write note: page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being written. physical page boundaries start at addresses that are integer multiples of the page buffer size (or ?page-size?) and end at addresses that are integer multiples of [page size - 1]. if a page write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page, as might be expected. it is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. s p bus activity master sda line bus activity s t a r t s t o p control byte word address data a c k a c k a c k s p bus activity master sda line bus activity s t a r t control byte word address (n) data (n) data (n + 15) s t o p a c k a c k a c k a c k a c k data (n + 1)
24aa08/24lc08b ds21710c-page 8 ? 2003 microchip technology inc. 5.0 acknowledge polling since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). once the stop condition for a write command has been issued from the master, the device initiates the internally-timed write cycle and ack polling can then be initiated immediately. this involves the master sending a start condition followed by the control byte for a write command (r/w = 0 ). if the device is still busy with the write cycle, no ack will be returned. if the cycle is complete, the device will return the ack and the master can then proceed with the next read or write command. see figure 5-1 for a flow diagram of this operation. figure 5-1: acknowledge polling flow 6.0 write protection the 24xx08 can be used as a serial rom when the wp pin is connected to v cc . programming will be inhibited and the entire memory will be write-protected. send write command send stop condition to initiate write cycle send start send control byte with r/w = 0 did device acknowledge (ack = 0)? next operation no yes
? 2003 microchip technology inc. ds21710c-page 9 24aa08/24lc08b 7.0 read operation read operations are initiated in the same way as write operations, with the exception that the r/w bit of the slave address is set to ? 1 ?. there are three basic types of read operations: current address read, random read and sequential read. 7.1 current address read the 24xx08 contains an address counter that main- tains the address of the last word accessed, internally incremented by ? 1 ?. therefore, if the previous access (either a read or write operation) was to address n , the next current address read operation would access data from address n + 1 . upon receipt of the slave address with r/w bit set to ? 1 ?, the 24xx08 issues an acknowl- edge and transmits the 8-bit data word. the master will not acknowledge the transfer but does generate a stop condition and the 24xx08 discontinues transmission (figure 7-1). 7.2 random read random read operations allow the master to access any memory location in a random manner. to perform this type of read operation, the word address must first be set. this is accomplished by sending the word address to the 24xx08 as part of a write operation. once the word address is sent, the master generates a start condition following the acknowledge. this terminates the write operation, but not before the internal address pointer is set. the master then issues the control byte again, but with the r/w bit set to a ? 1 ?. the 24xx08 will then issue an acknowledge and trans- mit the 8-bit data word. the master will not acknowl- edge the transfer but does generate a stop condition and the 24xx08 will discontinue transmission (figure 7-2). 7.3 sequential read sequential reads are initiated in the same way as a random read, except that once the 24xx08 transmits the first data byte, the master issues an acknowledge as opposed to a stop condition in a random read. this directs the 24xx08 to transmit the next sequentially- addressed 8-bit word (figure 7-3). to provide sequential reads, the 24xx08 contains an internal address pointer that is incremented by one upon completion of each operation. this address pointer allows the entire memory contents to be serially read during one operation. 7.4 noise protection the 24xx08 employs a v cc threshold detector circuit which disables the internal erase/write logic if the v cc is below 1.5v at nominal conditions. the scl and sda inputs have schmitt trigger and filter circuits which suppress noise spikes to assure proper device operation, even on a noisy bus. figure 7-1: current address read sp bus activity master sda line bus activity s t o p control byte data (n) a c k n o a c k s t a r t
24aa08/24lc08b ds21710c-page 10 ? 2003 microchip technology inc. figure 7-2: random read figure 7-3: sequential read s p s bus activity master sda line bus activity s t a r t s t o p control byte a c k word address (n) control byte s t a r t data (n) a c k a c k n o a c k p bus activity master sda line bus activity s t o p control byte a c k n o a c k data (n) data (n + 1) data (n + 2) data (n + x) a c k a c k a c k
? 2003 microchip technology inc. ds21710c-page 11 24aa08/24lc08b 8.0 pin descriptions the descriptions of the pins are listed in table 8-1. table 8-1: pin function table 8.1 serial address/data input/output (sda) sda is a bidirectional pin used to transfer addresses and data into and out of the device. since it is an open- drain terminal, the sda bus requires a pull-up resistor to v cc (typical 10 k ? for 100 khz, 2 k ? for 400 khz). for normal data transfer, sda is allowed to change only during scl low. changes during scl high are reserved for indicating start and stop conditions. 8.2 serial clock (scl) the scl input is used to synchronize the data transfer to and from the device. 8.3 write-protect (wp) the wp pin must be connected to either v ss or v cc . if tied to v ss , normal memory operation is enabled (read/write the entire memory 00-03ffh ). if tied to v cc , write operations are inhibited. the entire memory will be write-protected. read operations are not affected. this feature allows the user to use the 24xx08 as a serial rom when wp is enabled (tied to v cc ). 8.4 a0, a1, a2 the a0, a1 and a2 pins are not used by the 24xx08. they may be left floating or tied to either v ss or v cc . name pdip soic tssop msop sot-23 description a0 1 1 1 1 ? not connected a1 2 2 2 2 ? not connected a2 3 3 3 3 ? not connected v ss 44442ground sda 5 5 5 5 3 serial address/data i/o scl66661serial clock wp 7 7 7 7 5 write-protect input v cc 8 8 8 8 4 +1.8v to 5.5v power supply
24aa08/24lc08b ds21710c-page 12 ? 2003 microchip technology inc. 9.0 packaging information 9.1 package marking information 8-lead soic (150 mil) example: xxxxxxxx t/xxyyww nnn 24lc08b i/sn0327 13f 5-lead sot-23 example: xxnn m43f legend: xx...x customer specific information* t temperature grade (i, e) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard otp marking consists of microchip part number, year code, week code, and traceability code. device tssop/msop marking codes std pb-free 24aa08 4a08 g4a8 24lc08b 4l08 g4l8 device sot-23 marking codes std pb-free 24aa08 b4 b4 24lc08b-i m4 m4 24lc08b-e n4 n4 note: pb-free part number using ?g? suffix is marked on carton xxxxxxxx t/xxxnnn yyww 8-lead pdip (300 mil) example: 24lc08b i/p13f 0327 8-lead tssop example: 8-lead msop example: xxxx tyww nnn xxxxxt ywwnnn 4l08 i327 13f 4l08bi y32713f
? 2003 microchip technology inc. ds21710c-page 13 24aa08/24lc08b 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
24aa08/24lc08b ds21710c-page 14 ? 2003 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
? 2003 microchip technology inc. ds21710c-page 15 24aa08/24lc08b 8-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a2 a a1 l c 1 2 d n p b e e1 foot angle 048048 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic
24aa08/24lc08b ds21710c-page 16 ? 2003 microchip technology inc. 8-lead plastic micro small outline package (ms) (msop) d a a1 l c (f) a2 e1 e p b n 1 2 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 ref f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .003 .009 .006 .012 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 typ. .033 min p n units .026 bsc nom 8 inches 0.95 ref - - .009 .016 0.08 0.22 0 0.23 0.40 8 millimeters* 0.65 bsc 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 8 -- - 15 5 - 15 5 - jedec equivalent: mo-187 0 - 8 5 5 - - 15 15 - - - -
? 2003 microchip technology inc. ds21710c-page 17 24aa08/24lc08b 5-lead plastic small outline transistor (ot) (sot-23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.43 0.35 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0.35 .022 .018 .014 l foot length 3.10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.63 1.50 .069 .064 .059 e1 molded package width 3.00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .003 .000 a1 standoff 1.30 1.10 0.90 .051 .043 .035 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .035 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .038 p pitch 5 5 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 p d b n e e1 l c a2 a a1 p1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: mo-178 drawing no. c04-091 significant characteristic
24aa08/24lc08b ds21710c-page 18 ? 2003 microchip technology inc. appendix a: revision history revision c corrections to section 1.0, electrical characteristics. section 9.1, 24lc08b standard marking code.
? 2003 microchip technology inc. ds21710c-page 19 24aa08/24lc08b on-line support microchip provides on-line support on the microchip world wide web site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape ? or microsoft ? internet explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available at the following url: www.microchip.com the file transfer site is available by using an ftp service to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: latest microchip press releases technical support section with frequently asked questions design tips device errata job postings microchip consultant program member listing links to other useful web sites related to microchip products conferences for products, development systems, technical information and more listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive the most current upgrade kits. the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world. 042003
24aa08/24lc08b ds21710c-page 20 ? 2003 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this document. to : technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21710c 24aa08/24lc08b 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document?
? 2003 microchip technology inc. ds21710c-page 21 24aa08/24lc08b product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part no. x /xx package temperature range device 24aa08: = 1.8v, 16 kbit i 2 c serial eeprom 24aa08t: = 1.8v, 16 kbit i 2 c serial eeprom (tape and reel) 24lc08b: = 2.5v, 16 kbit i 2 c serial eeprom 24lc08bt: = 2.5v, 16 kbit i 2 c serial eeprom (tape and reel) temperature range: i = -40c to +85c e = -40c to +125c package: p = plastic dip (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead st = plastic tssop (4.4 mm), 8-lead ms = plastic micro small outline (msop), 8-lead ot = sot-23, 5-lead (tape and reel only) lead finish blank = standard 63% / 37% snpb g = matte tin (pure sn) examples: a) 24aa08-i/p: industria l temperature,1.8v, pdip package b) 24aa08-i/sn: industrial temperature,1.8v, soic package c) 24aa08t-i/ot: industrial temperature, 1.8v, sot-23 package, tape and reel d) 24lc08b-i/p: industrial temperature, 2.5v, pdip package e) 24lc08b-e/sn: automotive temp.,2.5v soic package f) 24lc08bt-i/ot: industrial temperature, 2.5v, sot-23 package, tape and reel g) 24lc08b-i/pg: industrial temperature, 2.5v, pdip package, pb-free h) 24lc08bt-i/sng: industrial temperature, 2.5v, soic package, tape and reel, pb-free x lead finish
24aa08/24lc08b ds21710c-page 22 ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. ds21710c-page 23 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application m eets with your specifications. no representation or warranty is given and no liability is assumed by microchip technol ogy incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microc hip?s products as critical com- ponents in life support systems is not authorized except with express written approval by mi crochip. no licenses are con- veyed, implicitly or otherwis e, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate and powersmart are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval and the embedded control solutions company are registered trademarks of micr ochip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, powercal, powerinfo, powermate, powertool, rflab, rfpic, select mode, smartsensor, smartshunt, smar ttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned he rein are property of their respective companies. ? 2003, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconductor manufacturer c an guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are comm itted to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
ds21710c-page 24 ? 2003 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com atlanta 3780 mansell road, suite 130 alpharetta, ga 30022 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, in 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 phoenix 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-4338 san jose 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu rm. 2401-2402, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - hong kong sar unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen rm. 1812, 18/f, building a, united plaza no. 5022 binhe road, futian district shenzhen 518033, china tel: 86-755-82901380 fax: 86-755-8295-1393 china - shunde room 401, hongjian building no. 2 fengxiangnan road, ronggui town shunde city, guangdong 528303, china tel: 86-765-8395507 fax: 86-765-8395571 china - qingdao rm. b505a, fullhope plaza, no. 12 hong kong central rd. qingdao 266071, china tel: 86-532-5027355 fax: 86-532-5027205 india divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 singapore 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 taiwan kaohsiung branch 30f - 1 no. 8 min chuan 2nd road kaohsiung 806, taiwan tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe austria durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45-4420-9895 fax: 45-4420-9910 france parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany steinheilstrasse 10 d-85737 ismaning, germany tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy via quasimodo, 12 20025 legnano (mi) milan, italy tel: 39-0331-742611 fax: 39-0331-466781 netherlands p. a. de biesbosch 14 nl-5152 sc drunen, netherlands tel: 31-416-690399 fax: 31-416-690340 united kingdom 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44-118-921-5869 fax: 44-118-921-5820 07/28/03 w orldwide s ales and s ervice

▲Up To Search▲

Price & Availability of 24AA08ST

	To Download 24AA08ST Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .